Table B.1

+================-============================================-===============+ 
|       Parameter|                                            | Jitter budget | 
|           label|           Description                      |    +/- ns     | 
|----------------+--------------------------------------------+---------------| 
|              a | clock offset                               |       5       | 
|              b | transmitting logic skew                    |       3       | 
|Transmitting  c | foil delay                                 |       1       | 
|  Device      d | transmitter propogation delay skew         |       6       | 
|              e | foil delay                                 |       1       | 
|              f | drop cable propogation delay               |       1       | 
|-- Connector  --|--------------------------------------------|---------------| 
|              g | external cable - skew between pairs        |       5       | 
|   Cable      h | distortion due to cable impedance          |       1       | 
|              i | distortion due to intersymbol interferance |       2       | 
|              j | bias distortion                            |       2       | 
|-- Connector  --|--------------------------------------------|---------------| 
|              k | drop cable propogation delay               |       1       | 
|Receiving     l | foil delay                                 |       1       | 
| Device       m | receiver propogation delay skew            |       9       | 
|              n | foil delay                                 |       1       | 
|              o | logic setup/hold                           |       5       | 
|----------------+--------------------------------------------+---------------| 
|                | total jitter budget                        |      44       | 
+=============================================================================+